1. Field of the Invention
The present invention relates to a circuit and method capable of compensating for a non-linear characteristic, especially to a digital pre-distortion circuit and method and a digital pre-distortion training circuit capable of compensating for the non-linear characteristic of an analog circuit.
2. Description of Related Art
Generally speaking, an analog circuit including a non-linear element (e.g., a transistor) has the problem of obvious non-linear output distortion under certain operation conditions. For instance, take a power amplifier (PA) that is usually used in a transmitter of a communication system for example; if the amplitude of an input signal goes beyond the linear region of the power amplifier, a non-linear distortion will occur in the power amplifier's output signal, and the distortion of signals falling within a current frequency band and the interference to signals falling within a neighboring frequency band will occur as well. Moreover, in some wireless communication broadband OFDM (Orthogonal Frequency Division Multiplexing) system, a power amplifier of a high rating not only has the problem of non-linearity, but also the problem of memory effects, which means that the output of the power amplifier at the moment will correlate with the output of the power amplifier at the previous moment. These problems make the compensation of non-linearity quite difficult.
Regarding linearization techniques for a power amplifier, the feedforward technique, the negative feedback technique and the linear pre-distortion technique are popular nowadays, among which the linear pre-distortion technique is widely used, good at cost, efficiency and stability, and quite practicable. Accordingly, some people developed an analog radio-frequency pre-distortion technique; unfortunately, because the radio-frequency pre-distortion involves radio-frequency non-linear active elements and the parameter adjustments thereof, this technique faces the problem of high design complexity. Besides, some people developed a digital pre-distortion (DPD) technique which construes a pre-distortion configuration according to Volterra Series and the modification thereof or the simplified memory polynomial (MP) thereof (that is to say the memory polynomial operable to represent the non-linearity characteristic of a power amplifier) and the DPD technique can be realized through hardware such as a look-up table (LUT) or a polynomial calculating circuit.
However, the mentioned look-up table requires a lot of memory space and is short of precision due to cost concern, while the mentioned polynomial calculating circuit requires a lot of calculation resource to determine many coefficients when the depth of memory effects is serious and the order of the memory polynomial is high. In consideration of cost, some people proposed using Least Mean Square (LMS) calculation for substitutions and convergence to determine the said coefficients. But LMS calculation is usually accompanied with the problem of poor convergence and stability because of the inappropriate setting of step for convergence (while an overly wider step makes convergence hard or unable to be achieved, and an overly narrower step consumes too much calculation resource and time), and also consumes a lot of chip area which is definitely not cost effective.
The digital pre-distortion technique making use of memory polynomial and examples of the said look-up table can be found in the following documents:    (1) Lei Ding, G. Tong Zhou, Dennis R. Morgan, Zhengxiang Ma, J. Stevenson Kenny, Joehyeong Kim, Charles R. Giardina, “MEMORY POLYNOMIAL PREDISTORTER BASED ON THE INDERECT LEARNING ARCHITECTURE”, School of Electrical and Computer Engineering of Georgia Institute of Technology in Atlanta, No. 0-7803-7632-3/02, IEEE, 2002.    (2) Hu Xin, Wang Gang, Wang Zi-Cheng, Luo Ji-Run, “Wideband Adaptive Predistortion Algorithm Based on LUT and Memory-Effect Compensation Techniques”, Vol. 34, No. 3, Journal of Electronics & Information Technology, March 2012.